139 lines
3.1 KiB
C
139 lines
3.1 KiB
C
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/*
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Copyright 2022 Mattia Giambirtone & Contributors
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef TSOS_CPU_ISR_H
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#define TSOS_CPU_ISR_H
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#include "kernel/types.h"
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/*
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The first 32 ISRs are reserved for CPU exceptions, so we
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manually forward-declare them. They will be implemented in
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assembly (hence why "extern" is explicit here, despite it
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being the default for C functions)
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*/
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extern void isr0(void);
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extern void isr1(void);
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extern void isr2(void);
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extern void isr3(void);
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extern void isr4(void);
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extern void isr5(void);
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extern void isr6(void);
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extern void isr7(void);
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extern void isr8(void);
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extern void isr9(void);
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extern void isr10(void);
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extern void isr11(void);
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extern void isr12(void);
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extern void isr13(void);
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extern void isr14(void);
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extern void isr15(void);
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extern void isr16(void);
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extern void isr17(void);
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extern void isr18(void);
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extern void isr19(void);
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extern void isr20(void);
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extern void isr21(void);
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extern void isr22(void);
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extern void isr23(void);
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extern void isr24(void);
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extern void isr25(void);
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extern void isr26(void);
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extern void isr27(void);
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extern void isr28(void);
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extern void isr29(void);
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extern void isr30(void);
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extern void isr31(void);
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typedef struct {
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/*
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A wrapper around the metadata
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that we pass to ISRs (from asm)
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when they're called
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*/
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u32 ds; /* The DS register */
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/* General Purpose registers saved by pusha */
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u32 edi;
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u32 esi;
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u32 ebp;
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u32 esp;
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u32 ebx;
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u32 edx;
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u32 ecx;
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u32 eax;
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u32 kind; /* The interrupt number */
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u32 err; /* The interrupt's error code (optional, may be zero) */
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/*
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These are pushed by the processor automatically when an interrupt
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is triggered
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*/
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u32 eip;
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u32 cs;
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u32 eflags;
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u32 useresp;
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u32 ss;
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} ISRMetadata;
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void installDefaultHandlers(void);
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void interruptHandler(ISRMetadata data);
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// Maps each builtin ISR number to an error message
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char* errorMessages[] = {
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"Division By Zero",
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"Debug",
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"Non Maskable Interrupt",
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"Breakpoint",
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"Into Detected Overflow",
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"Out of Bounds",
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"Invalid Opcode",
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"No Coprocessor",
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"Double Fault",
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"Coprocessor Segment Overrun",
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"Bad TSS",
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"Segment Not Present",
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"Stack Fault",
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"General Protection Fault",
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"Page Fault",
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"Unknown Interrupt",
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"Coprocessor Fault",
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"Alignment Check",
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"Machine Check",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved",
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"Reserved"
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};
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#define interruptMessage(x) errorMessages[x]
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#endif
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